1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device having an electric resistor portion such as a polysilicon resistor layer.
2. Background Art
A conventional semiconductor device will be described below referring to FIGS. 15 to 17.
FIG. 15 is a schematic sectional view of a conventional semiconductor device having a polysilicon resistor layer. In FIG. 15, the reference numeral 1 represents a pxe2x88x92-substrate as a substrate, 2 represents an n+-diffused layer, 3 represents a p+-diffused layer, 4 represents an nxe2x88x92-epitaxial layer formed on the n+-diffused layer 2 and the p+-diffused layer 3, 5 represents an nxe2x88x92-diffused layer, 6 represents a p+-diffused layer diffused from the surface of the formed nxe2x88x92-epitaxial layer 4 so as to extend to the p+-diffused layer 3, 8 represents an LOCOS (local oxidation of silicon) oxide film as a first insulating layer, 9 represents a p-layer formed on the p+-diffused layer 6, 16 represents p+-diffused layers formed by implantation immediately underneath the wiring, 17 represents an oxide film layer as a second insulating layer, 18 represents contact holes formed in the oxide film layer 17, 19 represents aluminum electrodes as wirings formed on the polysilicon resistor layer through the contact holes 18, and 20 represents a polysilicon resistor layer as a resistor layer.
Here, the polysilicon resistor layer 20 is formed by adding an impurity, such as boron, to polysilicon, and the quantity of the impurity is adjusted to obtain a desired electric resistance to control the current flowing through the polysilicon resistor layer 20. Furthermore, each of the LOCOS oxide film 8 and the oxide film layer 17 has a thickness sufficient to insulate current flowing through the polysilicon resistor layer 20 from flowing outwardly. Also, two aluminum electrodes 19 are electrically connected to the polysilicon resistor layer 20 at positions spaced apart from each other through the p+-diffused layers 16.
As described above, the portion constituted by the aluminum electrode 19, the p+-diffused layers 16, the polysilicon resistor layer 20, the LOCOS oxide film 8, and the oxide film layer 17 functions as the so-called electric resistor portion of the semiconductor device.
Next, a method for manufacturing the conventional semiconductor device will be described below referring to FIGS. 16a to 16d and 17a to 17c. FIGS. 16a to 16d are schematic sectional views showing the semiconductor device in each of conventional manufacturing process steps; and FIGS. 17a to 17c are schematic sectional views showing the semiconductor device in each of the continuing manufacturing process steps. The semiconductor device shown in each drawing includes a CMOS transistor portion in addition to the above-described electric resistor portion.
First, as FIG. 16a shows, after an oxide film is formed on the surface of the pxe2x88x92-substrate 1, photoengraving is performed to remove the unnecessary part of the oxide film on the pxe2x88x92-substrate 1. Antimony is implanted into the area from which the oxide film has been removed, and is driven (pushed) at 1240xc2x0 C. to form an n+-diffused layer 2. Thereafter, the oxide film remaining on the pxe2x88x92-substrate 1 is removed.
Then, after an oxide film of a thickness of several ten nanometers has been formed, photoengraving is performed to remove the unnecessary part of the oxide film. Boron is implanted into the area from which the oxide film has been removed, and is driven at 1150xc2x0 C. to form a p+-diffused layer 3. Thereafter, the oxide film remaining on the pxe2x88x92-substrate 1 is removed.
Then, on the pxe2x88x92-substrate 1, on which the n+-diffused layer 2 and the p+-diffused layer 3 have been formed, a pxe2x88x92-epitaxial layer 4 is formed so as to cover the n+-diffused layer 2 and the p+-diffused layer 3.
Next, as FIG. 16b shows, an oxide film of a thickness of several ten nanometers is formed on the pxe2x88x92-epitaxial layer 4, a nitride film is deposited thereon, and photoengraving is performed to remove the unnecessary part of the nitride film. Phosphorus is implanted into the area from which the nitride film has been removed, and an oxidation treatment is performed at 950xc2x0 C. to form an oxide film 7 and nxe2x88x92-diffused layers 5. Here, a part of the nxe2x88x92-diffused layers 5 (nxe2x88x92-diffused layer 5 on the right-hand side of the drawing) functions as a part of a p-channel MOS transistor described later.
Then, after the nitride film remaining on the topmost surface of the pxe2x88x92-substrate 1 has been removed, boron is implanted and is driven at 1180xc2x0 C. to form a p+-diffused layer 6. Here, a part of the p+-diffused layers 6 (p+-diffused layer 6 on the right-hand side of the drawing) functions as a part of an n-channel MOS transistor described later.
Next, as FIG. 16c shows, after the oxide film 7 on the nxe2x88x92-diffused layer 5 and the oxide film on the p+-diffused layer 6 and the nxe2x88x92-epitaxial layer 4 have been removed, an oxide film of a thickness of several ten nanometers is formed thereon. Then, after a nitride film has been deposited on the oxide film, photoengraving is performed to remove the unnecessary nitride film, and an LOCOS oxide film 8 of a thickness of about 400 nm is formed on the area from which the nitride film has been removed.
Then, after a resist has been applied to the surface, photoengraving is performed to remove the unnecessary part of the resist, and boron is implanted into the area from which the resist has been removed to form a p-layer 9 on the p+-diffused layer 6.
Next, as FIG. 16d shows, a polysilicon film is deposited on the topmost surface of the pxe2x88x92-substrate 1, and an impurity such as boron is implanted into the entire surface of the polysilicon film. Then, a resist is applied to the impurity-implanted polysilicon film, and patterning is performed to form a desired polysilicon resistor layer 20.
Next, as FIG. 17a shows, the oxide film formed on the topmost surface of the pxe2x88x92-substrate 1, and a thickness of several ten nanometers of the LOCOS oxide film 8 are removed. Then, on the nxe2x88x92-diffused layer 5 and the p-layer 9, corresponding to the CMOS transistor portion, an oxide film (gate oxide film) 10 of a thickness of 10 to 50 nm is formed.
On the oxide film 10, a polysilicon film 11 and a tungsten silicide film 12 are sequentially deposited. Furthermore, a resist is applied thereon, and patterning is performed to remove unnecessary parts of polysilicon film 11 and tungsten silicide film 12. Thereby, the gate electrode portion of the CMOS transistor is formed.
Thereafter, the resist is applied thereon, patterning is performed, and phosphorus is rotationally implanted by an angle of 45xc2x0, to form an nxe2x88x92-diffused layer 13 on the p-layer 9. Here the nxe2x88x92-diffused layer 13 is formed in the n-channel portion of the CMOS transistor.
Next, as FIG. 17b shows, the resist applied to the topmost surface in the previous process is removed, and an oxide film is deposited on the area from which the resist has been removed. Then, anisotropic etching is performed to form sidewalls 14 on the sides of the gate electrode portion comprising a polysilicon film 11 and a tungsten silicide film 12 formed in the previous process.
Then, after photoengraving is performed, arsenic is implanted into a part of the nxe2x88x92-diffused layer 13 and is driven at 900xc2x0 C. in a nitrogen atmosphere to form an n+-diffused layer 15. Here, the n+-diffused layer 15 functions as the n-channel source/drain region.
Then, in a p-channel side part of the nxe2x88x92-diffused layer 5, BF2 is implanted to form a p+-diffused layer 16. Here, the p+-diffused layer 16 functions as the p-channel source/drain region, and also improves ohmic contact with the polysilicon resistor layer 20.
Finally as FIG. 17c shows, an oxide film layer 17 of a thickness of about 800 nm is formed on the topmost surface of the pxe2x88x92-substrate 1. Then, photoengraving is performed to remove the unnecessary parts of the oxide film layer 17, and to form desired contact holes 18. Then, an aluminum film is formed on the entire topmost surface by sputtering, and photoengraving is performed to remove the unnecessary parts of the aluminum film. Thereby, desired aluminum electrodes 19 are formed. Here, among six aluminum electrodes 19 formed in this process, two from the right of the drawing become the p-channel source/drain electrodes of the CMOS transistor, two in the center of the drawing become the n-channel source/drain electrodes, and two from the left of the drawing become the electrodes for resistors.
The above-described conventional semiconductor device has a problem in that when a surge current flows in the polysilicon resistor layer of the resistor portion, the polysilicon resistor layer is heated and may be broken. This is because the oxide film and the LOCOS oxide film of as thick as several hundred nm surround the polysilicon resistor layer. Since these oxide films has a relatively low thermal conductivity, a large quantity of heat produced in the polysilicon resistor layer due to surge current cannot be conducted instantaneously. If the polysilicon resistor layer is broken due to heat, the original role as an electric resistance cannot be played.
An object of the present invention is to solve the above-described problem, and to provide a stable and reliable semiconductor device of which the polysilicon resistor layer is not broken even if a large quantity of current, such as a surge current, flows in the polysilicon resistor layer.
According to one aspect of the present invention, a semiconductor device comprises a first insulating layer formed on a substrate; a resistor layer formed on the first insulating layer and having a prescribed electrical resistance; a second insulating layer formed on the resistor layer; a plurality of wirings electrically connected, at positions spaced a part from each other on the resistor layer, to the resistor layer through holes formed in the second insulating layer; and a heat storage layer formed in the vicinity of the resistor layer for storing heat generated when a current flows in the resistor layer.
Other and further objects, features and advantages of the invention will appear more fully from the following description.